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HIG HBM PE Principal Component Validation Engineer

Fab 10A, Singapore💼 Full-time🗓 2025-12-08 → 2026-09-26

Core

Principal Component Validation Engineer for HBM (High Bandwidth Memory) within the Heterogenous Integration Group, responsible for silicon validation, debugging, and ensuring flawless product release.

Role type

Principal IC validation engineer (HBM/DRAM)

Builds

Validation flows, test programs, and root-cause analysis for HBM components

Domain

Semiconductor memory (HBM, DRAM), Heterogenous Integration

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

HBM component validation, silicon debugging, root cause analysis, test flow development, data interpretation, technical training

Preferred skills

DRAM operations, computer networking, presentation skills

Technologies

Linux, Python, C, C++, Verilog, UVM, git, svn

Responsibilities

Coordinate with manufacturing for resource and equipment needs, debug silicon failures and implement design/process fixes, develop and validate HBM testing programs, provide technical training and OJT to new engineers, act as product-specific point of contact

Seniority

Principal, hands-on IC with mentorship

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