Principal Engineer - FPGA/ASIC Design
Core
Design, verify, integrate, and test FPGA/ASIC solutions for Rolls-Royce engine control system products.
Role type
Principal Engineer - FPGA/ASIC Design
Builds
Custom digital devices (ASIC or FPGA) for electronic engine control units
Domain
Aerospace / Embedded Systems
Deliverable
production ML models | product features
Required skills
FPGA/ASIC architecture design, RTL development (VHDL, Verilog, SystemVerilog), simulation, timing closure, test bench creation, synthesis, place and route, power utilization analysis
Preferred skills
Lab validation with test equipment (oscilloscopes, logic analyzers), debugging tools (ILA, JTAG), scripting (TCL, Python, Shell), version control (Git, SVN), Xilinx/Actel tool flows, model-based systems (MATLAB, Simulink), SysML modeling (Cameo Systems Modeler)
Technologies
VHDL, Verilog, SystemVerilog, MATLAB, Simulink, Cameo Systems Modeler, Xilinx, Actel, Git, SVN, TCL, Python, Shell
Responsibilities
Develop detailed design documentation, verification plans, and reports; design and develop custom digital devices; verify complex products to DO-254 standards; debug designs via simulation tools; evaluate process flow including synthesis and timing constraints
Seniority
Principal, hands-on IC
