FE CPIE RDA Defect Engineering Snr Engineer/Principal Engineer
Core
Drive HBM defectivity improvement and optimize manufacturing performance for memory and storage solutions by aligning global peer groups and leveraging worldwide resources.
Role type
Senior/Principal Process Integration Engineering Real-Time Defect Analysis Engineer
Builds
High Bandwidth Memory (HBM) manufacturing processes and defect performance metrics
Domain
Semiconductor manufacturing, memory and storage solutions
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Global manufacturing strategy alignment, defectivity analysis, yield optimization, equipment utilization optimization, project lifecycle management, stakeholder coordination, cross-site benchmarking, supplier quality management, change management, technical coaching
Preferred skills
Experience with High Bandwidth Memory (HBM) technologies, knowledge of Best Known Methods (BKM), familiarity with Copy Smart Teams (CST) and Key Equipment Groups (KEG), ability to manage international travel
Technologies
Semiconductor manufacturing equipment, process integration tools, project management systems
Responsibilities
Facilitate global peer groups to align on strategy and roadmap for manufacturing objectives, prioritize resources to close performance gaps, manage Central Team programs and business processes, lead and coordinate project tasks across the network, track metrics for benchmarking Fab Performance, provide tactical support for Fab issues regarding quality and cycle time
Seniority
Senior/Principal, strategic leadership with hands-on technical execution