Associate ASIC and/or FPGA Design and Verification Engineer
Core
Develop state-of-the-art digital ICs/SoCs, specifically ASICs and FPGAs, for critical aerospace programs including satellite constellations and commercial aircraft systems.
Role type
Associate ASIC and FPGA Design and Verification Engineer
Builds
High-integrity, low SWAP-C flight computers and complex SoCs for Space & Launch and Avionics domains.
Domain
Aerospace / Defense / Digital IC Design
Deliverable
production ML models | product features | infrastructure
Required skills
ASIC/FPGA architectural definition, SystemVerilog, hardware-based integration and test, static timing analysis, LEC, CDC, linting, UVM, Object Oriented Programming, hardware emulators, high-speed Serdes interfaces, scripting languages (Make, Perl, Python), Linux environments.
Preferred skills
Master's degree in EE/CS, experience with Palladium hardware emulators, creating self-checking testbenches, functional coverage models, radiation mitigation techniques.
Technologies
SystemVerilog, UVM, Palladium, JESD204C, PCIe, Ethernet, svn, cvs, git, Linux
Responsibilities
Develop FPGA/ASIC designs supporting design and/or verification teams; Implement FPGA/ASIC from block-level micro-architecture through gate-level netlists; Integrate DSP IP; Perform static timing analysis, LEC, CDC, and linting; Develop Functional Coverage Models and perform Code Coverage; Create self-checking and reusable test benches; Support FPGA-based prototyping and validation; Validate design through hardware integration test.
Seniority
Associate, hands-on IC
