Senior Manager, Silicon Speed Productization — Silicon Co-Design Group
Core
Lead Silicon Speed Productization by owning simulation-to-silicon speed correlation, resolving timing failures, and defining product limits for high-performance silicon.
Role type
Senior Manager, Silicon Speed Productization
Builds
GPU, CPU, and SoC programs with industry-defining performance, power efficiency, yield, and quality
Domain
Semiconductor / High-performance computing
Deliverable
production ML models
Required skills
Silicon characterization, post-silicon validation, static timing analysis, critical-path behavior, clocking, power and timing interactions, semiconductor process variation, statistics, Python, data analysis, automation, root-cause analysis, team leadership
Preferred skills
AI tool application in characterization/debug workflows, building reusable correlation methodologies, tracing frequency misses to specific critical paths
Technologies
Python, JMP, SQL
Responsibilities
Own speed characterization and correlation from pre-silicon planning through production sign-off; Drive root-cause closure for speed failures and timing escapes; Refine methodologies for silicon margining, guardbanding, aging, and binning; Feed measured-silicon insights back into timing models and design practices; Convert characterization data into decision-ready options for leadership; Build closed-loop data, automation, and AI-assisted workflows; Hire, develop, and retain a high-performing, globally-distributed team
Seniority
Senior Manager, hands-on technical leadership
