CareerPlan

Senior DFT Engineer - Post Silicon

US, CA, Santa ClaraFull-time$168k2026-10-01 → 2026-11-10
Hybrid

Core

Drive post-silicon enablement of DFT capabilities from silicon bring-up through production ramp and lifecycle support for NVIDIA's advanced chips.

Role type

Senior IC DFT Engineer (Post-Silicon)

Builds

Production-ready DFT solutions, scalable flows, validation criteria, and debug procedures for semiconductor devices.

Domain

Semiconductor / Hardware Testing

Required skills

DFT concepts, silicon test, silicon bring-up, debug, validation, production test, engineering analysis, statistical analysis, automated test environments, semiconductor fundamentals

Preferred skills

Moving silicon features from development to production, core DFT features (scan, ATPG, MBIST), silicon characterization, manufacturing test, scalable engineering workflows, automation, analysis tools

Technologies

Scan, ATPG, MBIST, automated test environments

Responsibilities

Analyze test results, quality indicators, yield behavior, and test efficiency; Define and improve methodologies for silicon bring-up and failure analysis; Partner across design, product development, and test teams to align pre-silicon trade-offs with post-silicon execution.

Seniority

Senior, hands-on IC