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Formal Verification Engineer

China, Shanghai💼 Full-time🗓 2026-08-27 → 2026-09-25

Core

Senior Formal Verification Engineer responsible for crafting, designing, and validating GPU clocking RTL using formal verification techniques to support consumer graphics, self-driving cars, and AI product lines.

Role type

Senior IC formal verification engineer (hardware/ASIC)

Builds

GPU clocking RTL designs and verification environments

Domain

Semiconductor hardware design (ASIC/GPU) and formal verification

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

formal verification methodologies, assertion development, abstraction modeling, RTL debugging, flow/script development, TCL/Perl/Python scripting, Unit/Sub-system/SOC level verification

Preferred skills

Jasper Gold, VC Formal, protocol/data transmission verification, complex design analysis

Technologies

Jasper Gold, VC Formal, TCL, Perl, Python

Responsibilities

Write test plans and implement formal verification techniques (assumptions, assertions, cover properties); Develop abstraction models to achieve full or bounded proofs; Debug RTL to identify failure scenarios and achieve coverage sign-off; Drive tool performance optimization; Contribute to flow and script development; Collaborate with architects and designers to ensure deliverable quality

Seniority

Senior, hands-on IC

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