Chip Design Verification Engineer
Core
Build ref models, verify and simulate performance and power management related IPs for next-generation devices.
Role type
Chip Design Verification Engineer
Builds
Performance and power management related IPs
Domain
Semiconductor / Chip Design
Required skills
RTL Verification, System-Verilog, UVM
Preferred skills
Experience with System-Verilog UVM
Technologies
System-Verilog, UVM
Responsibilities
Build ref models, verify and simulate according to specifications and performance requirements, collaborate with Design and Architecture teams
Seniority
Mid-level, hands-on IC
