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Emulation Front-End Infrastructure Engineer

US, CA, Santa Clara💼 Full-time💰 $136,000–$136,000🗓 2026-08-10 → 2026-09-25

Core

Build scalable hardware development platforms and compilation flows for pre-silicon validation of NVIDIA's complex designs.

Role type

Senior IC emulation front-end infrastructure engineer

Builds

Scalable hardware emulation platforms and compilation flows

Domain

Semiconductor hardware design, EDA tools, high-performance computing

Deliverable

production ML models | product features

Required skills

RTL compilation and synthesis, Verilog/SystemVerilog, EDA tool expertise (Synopsys Design Compiler, ZeBu Compiler, Cadence HDL-ICE), Python/Perl/Tcl scripting, distributed compute farm management (LSF/Slurm), debugging complex compilation issues

Preferred skills

Hardware-emulation runtime bring-up, AI/LLM agents for failure diagnosis, EDA vendor partnership

Technologies

Synopsys Design Compiler, ZeBu Compiler, Cadence HDL-ICE, Python, Perl, Tcl, LSF, Slurm, Perforce, Git

Responsibilities

Own and evolve front-end compilation and synthesis flow infrastructure; develop and automate robust compilation flows; run and debug compilation regressions; apply AI techniques to improve flow automation and failure triage; evaluate and deploy EDA tools; diagnose complex elaboration and synthesis issues; improve flow performance and observability

Seniority

Senior, hands-on IC

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