Senior Design Engineer - Memory Subsystem
Core
Designing state-of-the-art memory subsystem components for industry-leading GPUs and SOCs used in consumer graphics, self-driving cars, and AI.
Role type
Senior IC design engineer (memory subsystem)
Builds
Memory sub-system components for GPUs and SOCs
Domain
Semiconductor / Hardware Design
Deliverable
production ML models
Required skills
Micro-architecture, RTL development, ASIC design flow, Verilog, Timing analysis, Logic synthesis, Floor-planning, Debugging
Preferred skills
Memory subsystem or network interconnect IP experience, FPGA prototyping, Scripting (Python/Perl/shell)
Technologies
VCS, Debussy, GDB, FPGA
Responsibilities
Own micro-architecture and RTL development of design modules; Micro-architect features to meet performance, power, and area requirements; Collaborate with verification teams to verify correctness; Interact with timing, VLSI, and Physical design teams; Co-operate with FPGA and S/W teams for prototyping; Work on post-silicon verification and debug.
Seniority
Senior, hands-on IC
