Senior Verification Engineer - ARM Fabric Unit Level
Core
Develop UVM-based verification test benches and methodologies for in-house ARM architecture-based distributed fabric units in automotive chips.
Role type
Senior IC verification engineer (ARM fabric unit level)
Builds
High-performance CPU and memory sub-systems, NOC-based interconnect fabric, high-speed I/Os for Tegra chips
Domain
Semiconductor / Automotive chips / ARM architecture
Required skills
UVM methodology, SystemVerilog (SV), ARM architecture protocols (AXI, AHB, APB), bus functional modeling, verification closure, functional coverage, simulation and debug tools
Preferred skills
AI tools for code development, formal verification, automation
Technologies
UVM, SystemVerilog, SV, AXI, AHB, APB, Tegra
Responsibilities
Architect testbenches and craft verification environments; Define test plans, tests, and verification infrastructure; Build efficient and reusable bus functional models, monitors, checkers, and scoreboards; Implement functional coverage and coordinate verification closure; Collaborate with architects, designers, FPGA, and post-silicon teams
Seniority
Senior, hands-on IC
