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Senior Chip Design Verification Engineer

Israel, Yokneam💼 Full-time🗓 2026-07-01 → 2026-09-26

Core

Design and implement next-generation Networking Silicon chips by building reference models and verifying chip blocks against specifications and performance requirements.

Role type

Senior IC chip design verification engineer

Builds

High-speed communication devices (Networking Silicon chips)

Domain

Semiconductor / Networking Silicon

Deliverable

production ML models | product features

Required skills

RTL verification, HDL (Verilog/VHDL), Specman, simulation

Preferred skills

Specman, Architecture knowledge, Micro-Architecture knowledge, FW knowledge, Post-Silicon validation knowledge

Technologies

Specman, Verilog, VHDL

Responsibilities

Build reference models, verify and simulate chip blocks/entities according to specifications and performance requirements, collaborate with Architecture, Micro-Architecture, FW, and Post-Silicon validation teams

Seniority

Senior, hands-on IC

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