Senior High-Speed IO Validation Engineer
Core
Own HSIO (PCIe/NVLink) validation of products from start to finish including test plan development, automation, design for validation requirements, resource planning, coverage metrics, test execution, bug resolution, and release to production.
Role type
Senior IC hardware validation engineer (high-speed interconnects)
Builds
GPU accelerated computing platforms and datacenter products
Domain
Semiconductor / High-speed interconnects (PCIe, NVLink, Infiniband, Ethernet)
Required skills
HSIO protocol validation (PCIe, Infiniband, Ethernet), logic and protocol analyzer operation, lab equipment usage (DSOs, BERT), post-Si bring-up and functional validation, system-level debugging, Python scripting, signal integrity concepts, SERDES functional validation
Preferred skills
PCIe physical layer debugging (LTSSM), data link and transaction layer expertise, x86/Arm server architectures, datacenter system management and security
Technologies
PCIe, NVLink, Infiniband, Ethernet, Python, DSOs, BERT, Logic Analyzers, Protocol Analyzers
Responsibilities
Develop test plans and automation for HSIO validation; coordinate with design, simulation, firmware, and marketing teams; assist in hardware bring-up and solve system/board-level issues; review board schematics and PCB layouts; ensure interoperability in complex interconnect topologies; provide engineering support for manufacturing in NPI and MP stages.
Seniority
Senior, hands-on IC
