Staff Engineer, RTL Design
Core
Own the overall logic design of on-chip memory controllers for new memory products, driving functionality from specification through verification and design closure.
Role type
Staff IC RTL Design Engineer (Memory/Storage)
Builds
High-performance DRAM, NAND, and NOR memory and storage products
Domain
Semiconductor / Memory and Storage
Deliverable
production ML models | product features
Required skills
RTL design, architecture specification, synthesis and timing constraints, static timing analysis (STA), back-end implementation, verification planning, cross-functional collaboration
Preferred skills
AI flows for code generation and verification, competitor analysis, mentoring
Technologies
Verilog, RTL, STA, APR, ECO
Responsibilities
Architect and integrate complex RTL blocks for memory products; Develop and optimize synthesis and timing constraints to meet performance, power, and area objectives; Perform RTL and gate-level verification at block, subsystem, and full-chip levels; Define best known design and verification practices; Collaborate with Device, System, Probe, Test, CAD, and Product Engineering groups to ensure manufacturability.
Seniority
Staff, hands-on IC with mentorship
