Intern - Next Gen HBM Platform Arch
Core
Develop electrical, thermal, and power-delivery architectures for next-generation High Bandwidth Memory (HBM) systems to support AI and high-performance computing.
Role type
Intern, IC hardware architecture engineer
Builds
Next-generation HBM memory platforms for AI and data center applications
Domain
Semiconductor industry, memory technology, electrical engineering
Required skills
electrical engineering fundamentals, VLSI design, signal integrity analysis, power integrity analysis, thermal modeling, semiconductor design principles, high-speed interface knowledge, system-level trade-off evaluation
Preferred skills
Cadence EDA tools, MATLAB, Python programming, analog design, 2.5D/3D integration, heterogeneous integration, engineering automation tool development
Technologies
HBM, DRAM, 2.5D/3D integration, Python, Cadence EDA, MATLAB
Responsibilities
Perform signaling and timing analysis for on-die and off-die interfaces; develop and evaluate thermal models for heat transfer and performance; analyze power delivery networks including IR-drop and electromigration; develop modeling and simulation tools for architecture evaluation; collaborate with design and packaging teams on system-level trade-offs
Seniority
Intern, academic/project-based
