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Intern - DRAM IP Circuits Design Engineer

Boise, ID - Main Site💼 Internship🗓 2026-08-10 → 2026-10-06

Core

Intern role supporting the design, simulation, and optimization of analog, mixed-signal, and high-speed interface circuits for next-generation DRAM IP blocks.

Role type

Intern - DRAM IP Circuits Design Engineer

Builds

High-quality DRAM Intellectual Property solutions for AI, Mobile, Client, Data Center, and Graphics products

Domain

Semiconductor / Memory / Analog & Mixed-Signal Circuit Design

Deliverable

production ML models | product features (via careerplan.io/jobs/JR108471-intern-dram-ip-circuits-design-engineer-at-micron)

Required skills

CMOS analog circuit design, CMOS digital circuit design, semiconductor device physics, signal integrity analysis, Python scripting, Perl scripting, TCL scripting, MATLAB, SPICE simulation, Verilog modeling, mixed-signal simulation, layout review, parasitic extraction, post-layout verification, Agentic AI workflows, automation script development

Preferred skills

Experience with high-speed interface design, physical design concepts (floor-planning, design rules), AI-assisted engineering tools, LLMs, Generative AI, AI-enabled workflows

Technologies

SPICE, Verilog, Python, Perl, TCL, MATLAB, EDA tools

Responsibilities

Assist in design, development, simulation, and optimization of analog/mixed-signal/high-speed circuits; Perform circuit simulations across process/voltage/temperature conditions; Support schematic development, layout review, and post-layout verification; Collaborate with verification and product engineering teams; Develop automation scripts and AI workflows to improve productivity

Seniority

Intern