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Senior Design Engineer

San Jose, CA💼 Full-time💰 $116,000–$116,000🗓 2026-07-12 → 2026-07-31

Core

Designing and verifying digital circuits for NAND memory products, optimizing performance, area, and power targets.

Role type

Senior IC digital design engineer (memory)

Builds

NAND memory chips and storage solutions

Domain

Semiconductor / Memory / Digital Logic

Deliverable

production ML models | product features

Required skills

Digital circuit design, RTL design, Gate-level verification, Synthesis, Architecture specification, Simulation, Silicon validation

Preferred skills

Technical leadership, Project management, Non-volatile memory technologies, Architecture guidelines, Documentation

Technologies

Verilog, RTL, Synthesis tools, AI tools

Responsibilities

Interpret device and system specifications to deliver required functionalities, Conceive and develop new circuits, Define composition architecture specifications, Support creation of schematics and RTL blocks, Perform RTL and synthesized netlist verification, Facilitate netlist bring up, Deliver design simulation including post layout, Design verification plans for new and existing features, Collaborate on validation plans and review silicon results, Assist in silicon design validation and tape-out revisions

Seniority

Senior, hands-on IC

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