STAFF ENGINEER, ASIC Design
Core
Designing high-performance storage and memory controllers (SSD, NAND, DDR) with a focus on data path, DMA, and scheduling logic.
Role type
Staff Engineer, ASIC RTL Design
Builds
High-performance SSD/NAND/DDR controllers and related silicon
Domain
Semiconductor / Memory and Storage
Deliverable
production ML models | product features
Required skills
SystemVerilog/Verilog, storage/memory controller design, high-speed interfaces, SoC integration, performance optimization, latency reduction, power optimization
Preferred skills
AI/ML for RTL automation, Python scripting, failure triage, debug analysis, workload prediction
Technologies
NVMe, PCIe, DDR, ONFI, Toggle NAND
Responsibilities
Develop RTL for SSD/NAND/DDR controllers, implement storage protocols, optimize for performance/latency/power, support verification and silicon debug
Seniority
Staff, hands-on IC
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