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Staff Design Engineer

San Jose, CA💼 Full-time💰 $145,000–$145,000🗓 2026-07-01 → 2026-07-31

Core

Designing and verifying digital circuits for NAND memory products, optimizing performance, area, and power targets.

Role type

Staff Design Engineer (Digital Circuits)

Builds

NAND memory chips and storage solutions

Domain

Semiconductor / Memory Technology

Deliverable

production ML models | product features

Required skills

Digital circuit design, RTL design, gate-level verification, architecture specification, simulation, silicon validation

Preferred skills

Technical leadership, project management, non-volatile memory technologies, architecture guidelines

Technologies

Verilog, RTL, Synthesis, Netlist, Post-layout simulation

Responsibilities

Interpret device and system specifications, conceive and develop new circuits, define architecture specifications, create and verify schematics/RTL blocks, perform RTL and gate-level verification, facilitate netlist bring up, deliver design simulation, design verification plans, collaborate on validation plans and silicon results review

Seniority

Staff, hands-on IC with leadership

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