Process Integration Development Engineer
Core
Drive technology transfers, optimize manufacturing processes, and improve yield in semiconductor defect metrology and process integration.
Role type
Senior Process Integration and Yield Engineer (Defect Metrology)
Builds
Industry-leading silicon process technology and packaging for AI-era compute devices
Domain
Semiconductor manufacturing / Process Integration / Yield Engineering
Required skills
Semiconductor processing/fabrication (Lithography, Etch, CMP, Thin Films), Statistical Process Control, Design of Experiments (DOE), Data analysis (JMP/JSL, Python), Root cause analysis, Continuous improvement methodologies, Quality and reliability risk assessment, Process characterization, Defect inspection and metrology techniques
Preferred skills
Failure analysis, Yield analysis, Electrical characterization of transistors, Image processing and classification, Computational data skills (large data handling, cleaning, visualization), Cross-functional team leadership, Advanced technology node experience
Technologies
JMP/JSL, Python, R, SQL
Responsibilities
Perform detailed data analysis to identify root causes of defect and yield issues; Drive low yield analysis and yield improvement activities; Design and implement continuous improvement initiatives; Develop flow, procedures, and equipment configurations for process modules; Design, execute, and analyze experiments to meet engineering specifications; Conduct quality and reliability risk assessments; Lead quality and integrated defect/parametric measurement in startup and high-volume environments; Mentor team members and influence technical direction
Seniority
Senior, hands-on IC with mentorship responsibilities
