RTL Design & Verification Engineer – AI
Core
Designing and verifying complex digital hardware for AI acceleration, including microarchitecture definition and RTL development.
Role type
FrontEnd RTL Design & Verification Engineer
Builds
AI-focused IPs and subsystems for data center compute
Domain
Semiconductor / AI Hardware
Deliverable
production ML models | product features
Required skills
Verilog, SystemVerilog, UVM, microarchitecture definition, pre-silicon debugging, algorithm understanding
Preferred skills
AI tools adoption, full HW development cycle knowledge
Technologies
Verilog, SystemVerilog, UVM
Responsibilities
Define microarchitecture and design RTL for AI IPs; Develop verification plans, test benches, and environments; Debug and resolve issues in pre-silicon environments; Collaborate with architects and physical design teams
Seniority
Junior to Mid-level IC Engineer
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