Sr Director - DfT, Test Development, HW Roadmap
Core
Lead a team of DfT and ATE HW Design Engineers to define and implement Design-for-Test methodologies, driving lowest cost-of-test across digital, analog, mixed-signal, memory, HSIO, and RF IPs and SOCs.
Role type
Senior Director, Hardware Test Strategy & Roadmap
Builds
ATE platforms, test method libraries, and production test flows for high-volume manufacturing
Domain
Semiconductor manufacturing, IC testing, Hardware Design
Required skills
DfT and BiST strategy, ATE platform definition, high-speed interface protocols (PCIe, LVDS, DDR, etc.), analog/mixed-signal/RF hardware design, factory test operations, cost-of-test optimization, cross-functional leadership
Preferred skills
Project management, navigating ambiguity, innovation in test solutions
Technologies
ATE platforms, DfT tools, high-speed interface standards, test instrumentation
Responsibilities
Define DfT and BiST methodologies for various IP types, define new ATE platforms based on long-term product roadmaps, develop standardized test method libraries, set ATE HW strategy for probe and final test, validate HW/SW at factory test cells, drive cost reduction in test operations
Seniority
Director, strategic planning and team leadership
