Senior ASIC Emulation Engineer
Core
Architect, bring up, and maintain enterprise-scale hardware emulation platforms and hybrid co-emulation systems to validate high-complexity network security processors and compute architectures before silicon production.
Role type
Senior IC ASIC Emulation Engineer
Builds
Pre-silicon emulation environments for next-generation firewall products
Domain
Semiconductor hardware design / Network security
Required skills
Hardware emulation, FPGA prototyping, ASIC verification, SystemVerilog, Verilog, C/C++, UVM, Python, Tcl, Platform debug tools, Speed adapters, Transactors
Preferred skills
Network hardware security architectures, High-speed Ethernet protocols, Hybrid Emulation/Virtual Platforms, C/C++ driver code development, Pre-silicon power estimation
Technologies
Cadence Palladium, Synopsys ZeBu, Siemens Veloce, SimVision, Indago, Verdi, PCIe, Ethernet, DDR, CXL, SystemC, TLM2.0, QEMU, Joules, PowerArtist
Responsibilities
Architect and maintain enterprise-scale hardware emulation platforms; Compile and fit multi-million/billion-gate SoC designs onto emulation hardware; Develop transactors, rate adapters, and hybrid virtual interfaces; Enable pre-silicon software development and OS/driver bring-up; Debug complex hardware, firmware, and protocol-level failures; Automate build, deployment, and regression flows using Python, Tcl, and CI/CD pipelines.
Seniority
Senior, hands-on IC (via careerplan.io/jobs/JR-023199-senior-asic-emulation-engineer-at-paloaltonetworks)
