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Senior Logic Design Engineer

Tel Aviv-Yafo, IsraelFull-time2026-10-04 → 2026-10-08

Core

Design and develop state-of-the-art flash solution IPs and define micro-architecture for complex algorithm hardware for Samsung's next-generation memory products.

Builds

Flash memory IPs (SSD, eMMC/UFS) and algorithm hardware

Domain

Semiconductor / Memory / VLSI

Required skills

VLSI micro-architecture, RTL implementation, hardware modeling and simulation, architecture definition, tape-out

Preferred skills

Power management techniques, low power design

Technologies

VLSI, RTL, Flash memory

Responsibilities

Design and develop state-of-the-art flash solution IPs, Plan and define micro-architecture of complex algorithm hardware, Conduct architecture research including modeling and simulations, Design IPs from early stages through tape-out