Formal Verification Lead
Core
Provide technical leadership for formal verification of complex, high-performance CPU cores, defining strategies, driving convergence/sign-off, and advancing methodologies for next-gen processor designs.
Role type
Senior IC formal verification lead (CPU cores)
Builds
Next-generation CPU cores and processor subsystems
Domain
Semiconductor / Computer Architecture / Digital Design
Required skills
Formal verification strategy, SystemVerilog Assertions (SVA), formal environments, constraints, abstraction, proof strategies, tool optimization, CPU microarchitecture, Python/Perl/Tcl/Shell scripting, technical leadership, mentoring
Preferred skills
CPU pipeline/execution unit/cache/coherency/control logic experience, formal methodologies/automation development
Technologies
Cadence JasperGold, Synopsys VC Formal, Siemens Questa Formal, SystemVerilog, Verilog
Responsibilities
Lead formal verification strategy and execution for complex CPU blocks; Own formal verification lifecycle from planning to sign-off; Develop and review SVA, properties, and verification environments; Partner with architects to identify corner cases and specification gaps; Drive formal convergence and debug; Define verification quality metrics; Drive innovation in formal methodologies and automation; Provide technical leadership and mentoring across teams.
Seniority
Senior, hands-on IC with leadership
