LEAD PLATFORM EMULATION ENGINEER
Core
Lead verification, validation, emulation, and debugging of AMD's System-on-Chip (SOC) designs and firmware/BIOS to ensure bug-free final products.
Role type
Senior IC Platform Emulation Engineer (SOC Verification)
Builds
Pre-silicon emulation tests, SOC design models, and test architectures for full-chip and hybrid models.
Domain
Semiconductor hardware design and verification (SOC, CPU, GPU, Memory subsystems)
Required skills
SOC architecture design, Emulation methodologies, RTL debugging, Firmware debugging, Test architecture design, Test plan creation, Root cause analysis, AI for hardware debug, Zebu/Palladium/Veloce platform expertise, Verilog/System Verilog, C/C++, Scripting (Perl/Ruby/Shell), PCIe/USB/Ethernet standards knowledge
Preferred skills
X86 architecture exposure, BIOS/OS bring-up experience, IP level ASIC verification, CPU/GPU/Memory subsystem expertise, Transactor solutions for SOC IO interfaces, Mentorship and team leadership
Technologies
Zebu, Palladium, Veloce, Verilog, System Verilog, C, C++, Perl, Ruby, Makefile, Shell, FPGA, RTL, AI tools
Responsibilities
Collaborate with architects and firmware engineers to define verification features; Drive emulation methodologies and test architecture; Build directed pre-silicon emulation tests; Debug test failures and resolve design defects; Write monitors and checkers for end-to-end validation; Run emulator workloads and analyze logs/waveforms; Use AI to improve emulation efficiency and automation.
Seniority
Senior, hands-on IC with leadership responsibilities
