ASIC Physical design Lead
Core
Plan, implement, and execute physical design and verification of processing subsystems IP to meet tapeout signoff criteria.
Role type
Senior IC ASIC Physical Design Lead
Builds
Processing subsystems IP for next-gen processors
Domain
Semiconductor / Digital IC Design
Required skills
Block-level and top-level physical implementation, low-power design, processor architecture, EDA tools (Innovus, Fusion Compiler, PrimeTime), scripting (Perl, Ruby, Makefile, shell), lower node technology (5nm or below)
Preferred skills
Leadership or mentorship experience
Technologies
Innovus, Fusion Compiler, PrimeTime, Perl, Ruby, Makefile, shell
Responsibilities
Plan and execute physical design flow, perform verification to meet signoff criteria, collaborate with cross-timezone engineering teams
Seniority
Senior, hands-on IC
