Senior Post Silicon Validation Engineer (PCIe / HSIO)
Core
Lead functional and compliance validation of PCIe and other high-speed I/O interfaces (xGMI, CXL, USB, SATA) from early silicon bring-up through production sign-off, driving root cause analysis on signal integrity and protocol-level failures.
Role type
Senior IC validation engineer (HSIO/PCIe)
Builds
High-speed I/O interfaces and silicon products
Domain
Semiconductor / Computer Architecture
Required skills
PCIe protocol validation, HSIO signal integrity analysis, test program infrastructure development, root cause analysis, multi-vendor interoperability testing, PCI-SIG compliance testing, scripting (Perl, Ruby, shell), statistical analysis
Preferred skills
Computer architecture knowledge, Linux/Unix/Windows proficiency
Technologies
PCIe, xGMI, CXL, USB, SATA, protocol analyzers, high-speed oscilloscopes, eye-diagram analysis tools
Responsibilities
Develop test program infrastructure incorporating best-known methods; Solve sophisticated, novel, and non-recurring problems; Identify and plan product improvement activities to reduce cost and improve yield; Lead functional and compliance validation of PCIe and other high-speed I/O interfaces; Drive root cause analysis on complex HSIO signal integrity and protocol-level failures; Plan and execute multi-vendor interoperability and PCI-SIG compliance testing
Seniority
Senior, hands-on IC
