High Speed IO (HSIO) Validation Engineer
Core
Validating and debugging high-speed interfaces (PCIe, Ethernet, UALink) across CPU and GPU platforms for data center servers and AI systems.
Role type
Senior IC hardware validation engineer (high-speed IO)
Builds
Industry-leading data center and AI processor platforms
Domain
Semiconductor hardware validation, high-speed serial interfaces, signal integrity
Required skills
High-speed serial interface validation (PCIe Gen5/6/7, CXL, Ethernet, UALink), Signal integrity analysis, Channel equalization (CTLE, DFE, TX FIR), Lab bring-up and debug, Test automation scripting (Python, C/C++), Oscilloscope/BERT/VNA usage, Root-cause analysis
Preferred skills
Server/AI platform validation, Compliance and interoperability testing, Automated validation framework development, Technical publications or patents
Technologies
PCIe Gen5/Gen6/Gen7, UALink, xGMI, Ethernet, Python, C/C++, Oscilloscopes, BERTs, VNAs, Protocol analyzers
Responsibilities
Execute validation plans for high-speed IO interfaces, Support post-silicon bring-up and characterization, Collaborate with design and firmware teams to resolve interface issues, Develop test automation and data analysis tools, Perform electrical and protocol-level debug, Analyze signal integrity and link training behavior
Seniority
Senior, hands-on IC
