High-Speed Signal Integrity Engineer
Core
Signal Integrity Engineer supporting high-speed interface design, simulation, validation, and analysis for next-generation server and AI platforms.
Role type
Senior IC hardware engineer (signal integrity)
Builds
Server and accelerator platforms with high-speed interfaces
Domain
Semiconductor / High-speed digital design
Required skills
Signal integrity analysis, transmission line theory, electromagnetic fundamentals, S-parameter modeling, time-domain/frequency-domain simulation, Python/MATLAB/Perl/C++ scripting, PCIe/DDR/Ethernet protocols, oscilloscope/VNA/TDR usage
Preferred skills
Cadence Sigrity, Ansys HFSS/SIwave, Keysight ADS, system bring-up and debug, automation flow development
Technologies
Cadence Sigrity, Ansys HFSS, Ansys SIwave, Keysight ADS, Python, MATLAB, Perl, C++, PCIe, DDR, Ethernet, USB
Responsibilities
Support signal integrity analysis and validation for high-speed interfaces (DDR, PCIe, Ethernet); Perform pre-silicon and post-silicon SI simulations, measurements, and correlation; Analyze channel performance using S-parameter models and simulation techniques; Assist in system bring-up, debug, characterization, and validation; Collaborate with cross-functional teams to resolve electrical performance issues; Develop scripts and automation flows to improve validation workflows; Document analysis results and best-known methods
Seniority
Mid-level to Senior, hands-on IC
