CareerPlan

ASIC Emulation Engineer

Santa Clara, CaliforniaFull-time2026-09-10 → 2026-10-22
No visa sponsorship

Core

Lead emulation of complex networking subsystems and SoCs using ZeBu, Veloce, and Palladium platforms to enable hardware-software co-verification and drive functional/performance validation before silicon.

Role type

Senior IC ASIC Emulation Engineer

Builds

Scalable emulation environments, transactors, and infrastructure for next-gen networking silicon

Domain

Semiconductor / Networking Silicon / Data Center Infrastructure

Required skills

ASIC emulation, RTL debugging, firmware/software co-verification, C/C++, Python, Tcl, Shell, transactor development, performance validation

Preferred skills

High-speed Ethernet, RDMA/RoCE, PCIe Gen5/Gen6, packet-processing pipelines, switch fabrics, QoS architectures, silicon bring-up, technical leadership

Technologies

ZeBu, Veloce, Palladium, RTL, C/C++, Python, Tcl, Shell

Responsibilities

Define emulation strategy for complex networking IP and SoCs; Bring up and deploy designs on emulation platforms; Develop reusable emulation environments and transactors; Enable firmware boot, driver development, and OS bring-up; Validate networking subsystems (Ethernet, PCIe, DMA, RDMA) and system-level performance; Debug complex issues across RTL, firmware, software, and system interactions; Mentor engineers and provide technical leadership

Seniority

Senior, hands-on IC with technical leadership