CareerPlan

Packaging Engineer

Suzhou, ChinaFull-time2026-09-07 → 2026-11-11

Core

Drive supplier engagement in external Flip Chip bumping/fan out/RDL/on substrate assembly manufacturers to deliver key performance indices on yield and excursion-free capabilities.

Role type

Senior IC Packaging Engineer (Backend Manufacturing)

Builds

Semiconductor ASIC packages (Flip Chip, RDL, Fan Out)

Domain

Semiconductor manufacturing / Advanced packaging

Required skills

Supplier engagement, New Product Introduction (NPI) planning, Issue resolution and prevention, Change management, Continuous improvement, Yield monitoring, Cross-functional project management, Analytics and troubleshooting

Preferred skills

Flip Chip assembly, Bumping/fan out/RDL process knowledge, Failure analysis, Package reliability, ESD/Jedec/Automotive standards, JMP/Minitab/AI agents

Technologies

JMP, Minitab, AI agents

Responsibilities

Drive supplier engagement on continuous improvement and new capabilities; Plan and drive New Product Introduction activities and Ramp Up readiness; Monitor external manufacturing site performance regarding yield and outliers; Execute change management; Proactively identify improvement opportunities for process simplification and quality enhancement; Support on-site audits and travel.

Seniority

Senior, hands-on IC