SOC Physical Design Lead
Core
Plan, implement, and execute the physical design and verification of processing subsystems IP to meet tapeout signoff criteria.
Role type
Senior IC physical design lead (processor architecture)
Builds
Processing subsystems IP for next-gen processors
Domain
Semiconductor / Digital IC Design / Processor Architecture
Required skills
Block-level and top-level physical implementation, low node technology (5nm or below), EDA tools (Innovus, Fusion Compiler, IC Compiler2, Primetime), scripting (TCL, Python), low power design, complex processor architecture
Preferred skills
Leadership or mentorship experience
Technologies
Innovus, Fusion Compiler, IC Compiler2, Primetime, TCL, Python
Responsibilities
Plan and execute physical design and verification of processing subsystems IP, collaborate with engineers across sites/timezones, solve complex implementation problems
Seniority
Senior, hands-on IC
