CareerPlan

2027 Undergrad Hardware Design Verification Engineering Co-op/Intern

San Jose, California; Santa Clara, CaliforniaInternship2026-08-20 → 2026-10-22
Hybrid · United StatesNo visa sponsorship

Core

Hardware Design Verification Engineering intern building test plans, simulation models, and validation flows for AMD's high-end Machine Intelligence products.

Role type

Hardware Design Verification Engineering Intern

Builds

Performance verification test plans, simulation models, and test platforms for AI processors

Domain

Semiconductors / Hardware Design Verification

Deliverable

production ML models

Required skills

Verilog, System Verilog, UVM, Perl, Python, C++, digital systems knowledge, logic design fundamentals, Linux/Unix/Windows debugging

Preferred skills

PC hardware assembly, oscilloscope/logic analyzer usage, analog/digital transistor behavior understanding

Technologies

Perl, Python, MySQL, PHP, Linux, Unix, Windows, UVM, Verilog, System Verilog

Responsibilities

Collaborate on performance verification test plans and simulation models; Write compute resource tracking scripts; Test regression flows; Support debugging and Verilog coding; Build test platforms and perform system-level testing; Execute production validation tasks

Seniority

Intern / Co-op