Staff Design Engineer - Video
Core
Design and test hardware modules for Image Signal Processors (ISPs), Display Processors, and Video codecs within Arm Compute Subsystems.
Role type
Staff Design Engineer (ASIC RTL)
Builds
Multimedia IP (ISPs, DPUs, VPUs) for automotive, IoT, and client markets
Domain
Semiconductor / Hardware Design
Deliverable
production ML models | product features
Required skills
ASIC RTL design, System Verilog, Verilog, VHDL, architectural modeling, backend implementation, UNIX scripting (TCL, Perl, Python)
Preferred skills
Image processing algorithms (tone mapping, noise reduction), AI/ML computer vision, Functional Safety (ISO 26262), C/C++ programming, SystemVerilog Assertions (SVA)
Technologies
AMBA interfaces, DDR specifications, CI flows
Responsibilities
Own unit level development or lead overall IP design, design and test new hardware modules, engage in full hardware design lifecycle, identify cross-media process improvements, collaborate with verification and software teams, mentor team members
Seniority
Staff, technical leadership & mentorship