Verification Engineer, PCIE
Core
Verify ASIC design, architecture, golden models, and micro-architecture of PCI Express controllers at IP/sub-system levels using UVM methodologies.
Role type
Senior IC verification engineer (PCI Express)
Builds
Reusable bus functional models, monitors, checkers, and scoreboards for PCI Express controllers
Domain
Semiconductor hardware design / Interconnect protocols
Required skills
Verilog, SystemVerilog, UVM, functional coverage, constrained random verification, ASIC verification, protocol verification (PCI Express, USB, SATA), test plan development, verification infrastructure design
Preferred skills
PCI Express Gen3+ protocol knowledge, CXL system architecture, Perl/Python scripting, debugging, analytical skills
Technologies
UVM, Verilog, SystemVerilog, Perl, Python
Responsibilities
Define verification scope and develop test plans/tests; build reusable verification components; verify correctness of design; collaborate with architects and designers
Seniority
Senior, hands-on IC
