SCG ArchDesign Engineer - New College Grad 2027
Core
Design silicon co-prototypes and measurement setups to characterize power, performance, noise, and binning behavior for GPU/SoC products.
Role type
Senior IC silicon co-design engineer (characterization & data pipelines)
Builds
Prototypes, measurement plans, and data pipelines for architecture, firmware, and manufacturing teams
Domain
Semiconductor hardware (GPU/SoC) and data engineering
Required skills
Python, DOE (Design of Experiments), silicon characterization, data pipeline development, Git, SQL, firmware tuning
Preferred skills
LLMs/agents, ATE/SLT screening, eFuse/limits, sim-to-silicon correlation
Technologies
Python, Git, SQL, LLMs, ATE, SLT
Responsibilities
Stand up silicon co-design prototypes and measurement setups; Plan and execute design of experiments (DOE); Build Python pipelines to analyze characterization data; Partner with architecture and firmware to iterate prototypes; Use AI-assisted workflows for experiment planning and documentation
Seniority
Senior, hands-on IC
