Senior Verification Engineer - HSIO Cluster and SOC
Core
Architect and develop verification components and testbenches for HSIO IP clusters and SOC-level systems, focusing on high-speed data transfer interfaces.
Role type
Senior IC verification engineer (HSIO/SOC)
Builds
Verification environments and testbenches for automotive chips and systems
Domain
Semiconductor / Automotive / High-speed I/O
Required skills
UVM, SystemVerilog, C/C++, High-speed I/O verification (UFS/PCIe/USB), Ethernet MAC/Switch knowledge, Bus Functional Models, Scoreboards, Functional Coverage
Preferred skills
AI tools for code development, Formal verification, Automation
Technologies
SystemVerilog, C/C++, UVM, SV, FPGA
Responsibilities
Architect testbenches and craft verification environments using SV and C/C++ methodology; Define test plans, tests, and verification infrastructure for clusters and systems; Build efficient and reusable bus functional models, monitors, checkers, and scoreboards; Implement functional coverage and own SOC level verification closure; Collaborate with architects, designers, FPGA, and post-silicon teams
Seniority
Senior, hands-on IC
