CareerPlan

DFT Engineer (RDSS Intern) - 2027

Taiwan, TaipeiInternship2026-09-29 → 2026-11-10
On-site · Taiwan

Core

Verify custom IP macros and validate designs at IP, cluster, and full chip levels to improve verification methodology for NVIDIA's product lines including consumer graphics, self-driving cars, and AI.

Role type

DFT Engineer (Research and Development Substitute Services Intern)

Builds

Verified silicon designs for NVIDIA's product lines

Domain

Semiconductor / Hardware Verification

Required skills

RTL/Gate-level design tracing (Verdi), verification simulation (VCS), SOC architecture knowledge, Python/Perl/Tck/C/C++

Preferred skills

Design for Testing (Scan/ATPG/BIST/JTAG)

Responsibilities

Verify custom IP macros, collaborate with Design/Integration/TE teams on verification scope and strategies, optimize simulation flow with CAD team, generate test patterns and perform silicon bring-up

Seniority

Intern