Senior Silicon Circuit Co-Design Engineer
Core
Co-design, bring-up, and post-silicon validation of analog, digital, and mixed-signal circuits for safety, security, reliability, and performance enhancement features in NVIDIA chips.
Role type
Senior Silicon Circuit Co-Design Engineer
Builds
Automated test orchestration, intelligent data pipelines, analysis flows, and characterization infrastructure.
Domain
Semiconductor / Hardware Engineering
Deliverable
production ML models
Required skills
Analog, digital, and mixed-signal circuit fundamentals, silicon bring-up, frequency and power characterization, post-silicon validation, PVT analysis, guard-banding, statistical analysis, Python, C/C++ scripting, oscilloscope and multimeter usage, silicon debug tools, power integrity analysis, transistor physics, silicon reliability and aging mechanisms.
Preferred skills
Co-design or correlation methodology development, root cause analysis of silicon anomalies, AI-driven flows for circuit analysis, engineering mentorship, datacenter-scale silicon experience.
Responsibilities
Own the co-design, bring-up, and post-silicon validation of circuits; close the simulation-to-silicon gap; trace failures to their source; build AI agents for automated test orchestration; build tools and automation infrastructure; sit at the decision table for binning and reliability sign-off; lead and mentor junior engineers.
Seniority
Senior, hands-on IC
