Senior Mixed Signal Design Engineer
Core
Architecture definition and design of CMOS high-speed interface circuits and mixed-signal circuits, including silicon validation and debugging.
Role type
Senior IC mixed-signal design engineer (high-speed interfaces)
Builds
High-speed transceivers, high-frequency PLLs, and mixed-signal circuits for GPU/AI chips (via careerplan.io/jobs/893396799815-senior-mixed-signal-design-engineer-at-nvidia)
Domain
Semiconductor / Analog & Mixed-Signal IC Design
Required skills
CMOS analog/mixed-signal circuit design, high-speed interface design (Tx/Rx/CDR/PLL), silicon bring-up and debugging, lab instrumentation, Cadence custom design tools, timing analysis, deep submicron CMOS process knowledge
Preferred skills
Data converter design, system-level timing budget analysis, signal integrity, power integrity, Verilog, Matlab, Nanotime
Technologies
Cadence, Verilog, Matlab, Nanotime
Responsibilities
Define architecture and design CMOS high-speed interface and mixed-signal circuits; Lead mask designers and mentor floorplan/layout teams; Perform simulation and verification of mixed-signal circuits; Support lab characterization of silicon; Take designs through implementation and productization
Seniority
Senior, hands-on IC