CareerPlan

System Co-Design Manager

China, ShanghaiFull-time2026-07-22 → 2026-11-10

Core

Lead architecture, methodology, and delivery for semiconductor system design covering power rail noise, circuit behavior, performance, and manufacturing quality.

Role type

Senior IC System Co-Design Manager

Builds

Datacenter, Server, Gaming, Robotics, Automotive, and Embedded silicon products

Domain

Semiconductor / VLSI / Hardware Design

Deliverable

production ML models

Required skills

Semiconductor/VLSI design, Simulation-to-Silicon correlation, Power noise analysis, Circuit behavior modeling, Performance optimization, Manufacturing quality assurance, Test chip development, NPI left-shift methodologies, Cross-functional technical leadership, AI-assisted engineering workflows

Preferred skills

GPU/CPU/SoC/AI accelerator design, RAG and AI agents familiarity, LLM benchmarking, Technical innovation and publication

Technologies

AI tools, AI-augmented engineering workflows

Responsibilities

Oversee power noise, circuit margin, performance and manufacturing quality system design & validation; Accelerate NPI via design/test left-shift and prototype emerging technologies; Evaluate multi-functional impacts of complex features and coordinate cross-team execution; Partner with cross-functional teams to maximize product performance and quality; Foster an empowered, innovative and resilient team culture; Advocate secure, traceable, validated AI-assisted workflows

Seniority

Senior, hands-on IC