Senior Verification Engineer - ARM Fabric Unit Level
Core
Develop UVM-based verification test benches and methodologies for in-house ARM architecture-based distributed fabric to transport control, sidebands, and data.
Role type
Senior IC verification engineer (ARM fabric unit level)
Builds
Verification environments, testbenches, bus functional models, monitors, checkers, and scoreboards for automotive chips.
Domain
Semiconductor / Chip Design / Automotive
Required skills
UVM methodology, SystemVerilog, ARM architecture protocols (AXI, AHB, APB), verification closure, bus functional modeling, functional coverage, debugging, analytical skills
Preferred skills
AI tools for code development, formal verification, automation
Technologies
UVM, SystemVerilog, SV, ARM, AXI, AHB, APB, FPGA
Responsibilities
Architect testbenches and craft verification environments using SV and UVM; Define test plans, tests, and verification infrastructure; Build efficient and reusable bus functional models, monitors, checkers, and scoreboards; Implement functional coverage and coordinate verification closure; Collaborate with architects, designers, FPGA, and post-silicon teams.
Seniority
Senior, hands-on IC
