Senior Post Silicon HSIO Bringup Lead
Core
Lead post-silicon validation and hardware bring-up for High Speed IO (HSIO) interfaces in GPU accelerated computing platforms, including PCIe, CXL, and NVLink.
Role type
Senior IC hardware validation lead (HSIO)
Builds
Reliable HSIO interfaces for GPU accelerated computing platforms, next generation client and automotive systems
Domain
Semiconductor / High-Speed Interconnects / GPU Computing
Required skills
HSIO protocols (PCIe, CXL, NVLink), post-silicon validation, FPGA/Emulator testing, board building, signal integrity, SERDES validation, lab instruments (DSOs, BERT, analyzers), Python scripting, x86/Arm server architectures
Preferred skills
PCI Express physical layer debugging (LTSSM), data link/transaction layer expertise, characterization techniques, datacenter product experience, AI tools (Claude, Cursor)
Technologies
PCIe, CXL, NVLink, FPGA, Emulator, Python, DSOs, BERT, Logic Analyzers, Protocol Analyzers
Responsibilities
Own HSIO validation on FPGA/Emulator and Silicon including test plan development, board building, automation, test execution, and bug resolution; Coordinate with cross-functional teams to ensure products meet specifications and drive to production; Review board schematics and PCB layouts for interoperability; Provide engineering support during NPI and MP stages; Influence pre-silicon development methodologies based on silicon debug insights
Seniority
Senior, hands-on IC
