SoC Data Path Engineer
Core
Lead post-silicon validation and debug of AMD's next-generation on-chip fabric and data transport architectures for CPU, GPU, and accelerator subsystems.
Role type
Senior IC SoC Data Path Engineer
Builds
Next-gen multi-die processors and chiplet-based systems
Domain
Semiconductor / High-Performance Computing
Required skills
post-silicon validation, hardware debug, SoC architecture, coherency protocols, memory hierarchies, scan dump analysis, JTAG debugging, C/C++, Python, Perl, fault injection, stress-testing
Preferred skills
multi-die/chiplet systems, graphics and compute architectures, GPU software stacks, RAS features, system telemetry analysis, cross-functional collaboration
Technologies
JTAG, scan dumps, C/C++, Python, Perl, on-chip fabrics, DMA, interrupts, address translation
Responsibilities
Lead post-silicon validation and debug of SoC fabric and interconnect; Drive root-cause analysis of silicon issues involving coherency and memory interactions; Develop and execute comprehensive validation plans with automation; Analyze scan dumps and telemetry to resolve hangs and protocol violations; Collaborate with design and software teams on hardware-software interactions; Lead cross-functional debug efforts across IPs and chiplets
Seniority
Senior, hands-on IC
