RTL / Circuit IP Design Engineer
Core
Plan, build, and execute implementation of new and existing features for AMD's programmable embedded IP to meet power, performance, and area targets.
Role type
RTL / Circuit IP Design Engineer
Builds
Programmable embedded IP blocks for AMD products
Domain
Semiconductor / Digital Logic Design
Required skills
Verilog, System Verilog, UVM, Linux, timing analysis, constraint setting, power domain crossing, clocking, reset, RTL synthesis, circuit design concepts
Preferred skills
Python, Perl, Ruby, Makefile, shell scripting, UPF concepts, SAPR constraints, high-speed interfaces, circuit macro generation, leadership/mentorship
Technologies
Verilog, System Verilog, UVM, Linux, Windows, Python, Perl, Ruby, Makefile, shell
Responsibilities
Collaborate with architects and engineers to understand new features; Author implementation documentation; Estimate implementation time and execute changes based on feedback; Build directed and random verification tests; Debug test failures and resolve design defects; Review functional and code coverage metrics
Seniority
Mid-Senior, hands-on IC
