Senior Lead Verification Engineer
Core
Verify complex design blocks at IP, Sub-system, or SoC level for client, server, graphics, and semi-custom interconnects to achieve first pass silicon success.
Role type
Senior Lead Verification Engineer (ASIC/SoC)
Builds
Front-end design and integration for Radeon Technologies Group products
Domain
Semiconductor / Hardware Design / Graphics
Required skills
System Verilog, UVM, ASIC verification, TestBench Architecture, Perl scripting, Ruby scripting, Make scripting, RTL design, Formal verification, Mentorship
Preferred skills
IP or Sub-system level ASIC verification, Complex verification environment architecture, UVM TestBench Development, 12+ years industry experience
Technologies
System Verilog, UVM, Perl, Ruby, Make, Infinity Fabric
Responsibilities
Develop and enhance System Verilog / UVM-based testbenches, Interact with architects and RTL designers to develop expertise in Infinity Fabric, Understand TestBench Architecture and develop expertise in TestBench Verification Components, Mentor junior engineers
Seniority
Senior Lead, hands-on IC with mentorship
