RFIC Layout Designer (Starshield Silicon)
Core
Lead the layout discipline for custom analog and RFIC designs, determining chip floor plans and integrating blocks for space and ground infrastructure.
Role type
Senior IC layout designer (RFIC/Mixed Signal)
Builds
Custom analog and RFIC chips for national security satellite systems
Domain
Semiconductor / RFIC / Space Systems
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
IC layout design, floor planning, power/ground distribution, DRC/LVS, tape-out, EDA tool usage
Preferred skills
Advanced node layout (16nm/7nm/5nm), high-frequency RF layout (up to 50GHz), sensitive RF block layout (LNA, VCO, mixers), skill programming, shell scripting/Python, revision control management
Technologies
Custom EDA tools, GDS, Foundry flows
Responsibilities
Determine chip floor plan and pad locations with packaging engineers; Estimate layout schedules and identify complexity; Perform layout of custom RF/analog blocks minimizing parasitics; Perform DRC, ERC, and LVS checks; Execute top-level integration, ESD structures, and final tape-out; Trial new EDA tools; Generate layout technique guides
Seniority
Mid-Senior, hands-on IC