Principal Debug Validation Engineer
Core
Lead post-silicon debug and validation for next-generation AI compute silicon and systems, resolving complex hardware, firmware, and system-level issues during bring-up and characterization.
Role type
Principal Debug Validation Engineer (Post-Silicon)
Builds
AI compute silicon and platform technologies
Domain
Semiconductor hardware / AI compute infrastructure
Deliverable
production ML models | infrastructure
Required skills
Post-silicon debug methodologies, SoC and platform architecture, bare metal environments, Python/C programming, Linux, JTAG/scan/DFT/trace infrastructure, fault tree analysis, system-level debug techniques
Preferred skills
DFT flows, debug tooling development, PCIe/Ethernet/Memory drivers, CoreSight infrastructure, Arm CPU architectures, AMBA protocols, ML workload characterization
Technologies
Python, C, CMM, Linux, JTAG, CoreSight, PCIe, Ethernet, LPDDR, DDR, HBM, I2C, I3C, SPI, Arm, AMBA
Responsibilities
Lead post-silicon debug and validation activities; Investigate and resolve complex silicon, firmware, software, and system-level issues; Develop structured debug methodologies and failure analysis processes; Collaborate with architecture, RTL, firmware, software, and systems teams; Drive debug of CPU, memory, interconnect, and high-speed I/O subsystems; Develop automated debug, regression, and validation infrastructure; Analyze logs, traces, telemetry, and hardware data; Define validation metrics and reporting standards; Support silicon readiness reviews and product quality decisions.
Seniority
Principal, hands-on IC with strategic oversight