Chip Lead / ASIC Director
Core
Provide technical leadership for Adaptive & Embedded Computing Group (AECG) device programs from conception to manufacturing release, solving cross-functional problems in architecture, RTL, analog, verification, and physical design.
Role type
Senior IC ASIC Director / Chip Lead
Builds
Adaptive & Embedded Computing Group (AECG) devices for AI, data centers, PCs, gaming, and embedded systems
Domain
Semiconductor / ASIC Design
Deliverable
production ML models
Required skills
ASIC design lifecycle expertise, architecture definition, RTL design, analog & custom design, physical design, timing closure, verification, post-silicon validation, IP negotiation, cross-functional problem solving
Preferred skills
FPGA technical experience, leadership in semiconductor companies, post-silicon validation experience, product planning and marketing collaboration
Technologies
RTL, analog, custom design, verification, physical design, tapeout
Responsibilities
Identify critical tradeoffs and architectural decisions; Advise on feasibility including schedule, cost, size, power, and floorplan; Serve as Engineering's interface to Technical Marketing; Define new device-specific functionality; Negotiate for new IP versions or variants; Resolve issues and guide trade-offs during program phases, especially in Physical Design; Communicate program changes and consequences to all stakeholders
Seniority
Director, hands-on IC leadership
